Date of Award

5-2-2025

Document Type

Thesis

School

School of Electrical & Electroncis Engineering

Programme

Ph.D.-Doctoral of Philosophy

First Advisor

Dr.K.Vijayarekha

Keywords

Multilevel Inverters, Machine Learning, Ant Colony Optimization, Fast Fourier Transform, Principal Component Analysis

Abstract

A paradigm shift towards electric drives in domestic and industrial sectors has significantly increased the use of multilevel inverters (MLI). MLIs are constructed using more semiconductor devices, which hinders safety and reliability. Literature states 31.2% of failures in MLIs are due to semiconductor devices. Hence, there is a need for fault detection and tolerant mechanisms to ensure the safety and reliability of MLIs.

MLIs like Cascaded H-bridge(CHB) and Packed U cell(PUC) are mostly preferred due to low harmonic distortion, which is considered in this work. The complexity associated with fault diagnosis with more components in MLIs is addressed by machine learning (ML). Various open and short circuit faults are simulated in the MLIs. About 14 features like Vrms, Mean, % THD, and harmonic orders (2-12) have been extracted from the output voltage using fast Fourier transform (FFT).

Principal Component Analysis (PCA) is used to reduce 42% of the redundant features, which relatively makes the ML model training faster and more accurate. Four different ML classifiers, namely Decision Tree(DT), k-nearest neighbour (KNN), Support Vector Machine(SVM) and Naive Bayesian ( NB) classifiers, are considered in this study. Simulation results illustrate that KNN and NB classifiers provide the highest classification accuracy of 96.32% and 97.11% for CHBMLI and PUCMLI, respectively.

Challenges associated with feature and classifier selection for fault classifier design are addressed using a novel ACO-based combined optimizer. The selection process is formulated as a combinatorial optimization problem and solved using multi-objective ACO. Among the four classifiers, KNN and NB provides 97.80% and 98.07% fault detection accuracy in CHBMLI and PUCMLI, respectively, with eight optimal features.

A fault-tolerant structure for PUCMLI is proposed to ensure operation continuity even under faulty conditions. It can provide continuous operation of the MLI with the same rated power under faulty circumstances. The failure rate of individual switches is estimated based on voltage stress and temperature.

It is observed that failure rate of switches T1 and T4 in PUCMLI is found to be higher at 0.914 failures/million hours as compared with others. Thus, the proposed structure is capable of preventing the failure of MLIs and guarantees a higher reliability. The proposed fault diagnosis approach can be extended to identify deterioration in passive components and to diagnose the multiple switch faults in MLI.

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